Alif Semiconductor /AE302F40C1537LE_CM55_HE_View /AES0 /AES_INTERRUPT_MASK

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Interpret as AES_INTERRUPT_MASK

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)REGS_ERR_RESP 0 (Val_0x0)SPI_ERR_RESP

REGS_ERR_RESP=Val_0x0, SPI_ERR_RESP=Val_0x0

Description

AES Interrupt Mask Register

Fields

REGS_ERR_RESP

Mask for the Register Error Response interrupt.

0 (Val_0x0): Register Error Response interrupt is not masked.

1 (Val_0x1): Register Error Response interrupt is masked.

SPI_ERR_RESP

Mask for the SPI Error Response interrupt.

0 (Val_0x0): SPI Error Response interrupt is not masked.

1 (Val_0x1): SPI Error Response interrupt is masked.

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